SPARC is ÅAC Microtecs 6U Cubesat platform. The design is based on the SPARC-1 satellite developed under primeship of ÅAC Microtec for the Swedish Defence Materiel Administration (FMV) and the US Air Force Research Laboratory (AFRL) under a US-Swedish bilateral agreement.
SPARC is a CSD compliant, 6U 30 W Average Orbit Power (AOP) three-axis attitude controlled spacecraft bus, with an S-band software defined radio (SDR) capable of 1 Mbps download rate and a fully integrated attitude and orbit control system (ACS) enabling attitude control better the 1 degrees and 0.1 degrees point knowledge accuracy to the bus.
A GPS sensor interfaced directly with the ACS enables precise orbit navigation for supporting Earth frame referenced attitude control and time reference. The CCSDS standard is utilized, a key to commercial ground station networks. The DHS processor cores is an OpenRisc fault-tolerant processors, a computer unit with embedded Spacewire routers with two external SpaceWire ports on each computer module, enabling both redundant, and daisychain network topologies. The flight software application runs on RTEMS real time operating system.